The MangoPi MQ Pro has launched in China. This tiny single-board computer (SBC) uses the same form factor as the better known but equally diminutive Raspberry Pi Zero W, which we reviewed in October 2021. However, the new MangoPi MQ Pro has a crucial difference from the UK-designed SBC, setting it apart from the multitude of clones - it uses a RISC-V processor.
In January, the MangoPi MQ Pro had reached its final design and was ready for mass production. The SBC used a green PCB at that time, but now it is pleasing to see it has fully ripened, with an eye-catching red PCB.
With the design finalized, it hasn't taken long for MangoPi to get the first MQ Pro boards to retail. CNX Software noticed it had started to become available in China, priced at the local equivalent of ~$20. It is only on China's Taobao right now, but the news outlet reckons it will arrive on retailers like Aliexpress in due course, an accessible portal for buyers that are outside of China.
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| MangoPi MQ Pro Specifications | |
|---|---|
SoC | Allwinner D1, C906 Core, RISC-V core up to 1GHz |
RAM | 512MB (model MPi-MQ1PL) or 1GB DDR3 (MPi-MQ1PH) |
USB | USB-OTG Type-C, USB-HOST Type-C |
Other ports | Mini HDMI connector, TF card |
Connectors | 40 Pin Raspberry Pi compatible GPIO header, 24 Pin DVP/RGMII connector, 20 Pin DSI/CTP/LVDS FPC connector, Audio OUT pads |
Networking | Onboard Wi-Fi/BT, Ethernet via 24 Pin conenctor |
Dimensions | 6.5 x 3cm |
The big attraction of the MangoPi MQ Pro for a particular group of developers, makers, and tinkerers will be the RISC-V architecture processor on board. The exact processor used is the Allwinner D1 C906, which also features on MangoPi's postage-stamp-sized MQ1 board. In brief, this SoC's RISC-V core runs at up to 1 GHz and features a DSP, 2D graphics acceleration, and a VPU capable of 4K H.265/H.264.
You may have noticed by omission – that the Allwinner D1 SoC doesn't feature 3D acceleration. Thus the MangoPi MQ Pro won't be as well-rounded as the $15 Raspberry Pi Zero W. The MangoPi MQ Pro is probably more suited to 2D desktop applications and headless use cases. Moreover, if you buy a MangoPi MQ Pro, you will also have a more limited choice of OS – with purported support for either Tina-Linux or Debian. Finally, it's important to note that the GitHub repository for the MQ Pro is a bit empty currently. We hope that some more software and documentation become available before this SBC gets into the user's hands.
Readers may balk at the $20 ticket price of the MangoPi MQ Pro when the Raspberry Pi Zero W has an MSRP of $15. However, it is one of the most affordable RISC-V boards currently available, and the scarcity and uniqueness have a price. In addition, we recently reported that potential Raspberry Pi purchasers are presently having a hard time sourcing stock, depending on the model, so scarcity is also affecting SBCs like the Pi Zero W.
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Mark Tyson
News Editor
Mark Tyson is a news editor at Tom's Hardware. He enjoys covering the full breadth of PC tech; from business and semiconductor design to products approaching the edge of reason.
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3 CommentsComment from the forums
Findecanor The single CPU core is a T-Head XuanTie C906.
RV64GC with MMU, In-order at max 1 GHz.In other sources, itis said to have Vector-instructions but if it does it is most probably an obsolete variant, because the V-extension spec was only finalised last summer and the C906 design is older than that.
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brucehoult Findecanor said:
The single CPU core is a T-Head XuanTie C906.
RV64GC with MMU, In-order at max 1 GHz.In other sources, itis said to have Vector-instructions but if it does it is most probably an obsolete variant, because the V-extension spec was only finalised last summer and the C906 design is older than that.
Sure, as the D1 SoC has been available for a year already and the C906 core it is was designed around 2.5 years ago, it implements an older draft 0.7.1 version of the RISC-V vector spec.
You can call this "obsolete", but as there are no competing chips on the market now with a newer version -- and probably not for the next 12 months -- I'm not sure that's really fair. For the moment the choice is 0.7.1 or nothing.
It's not as if you even have a choice of ARM SVE (spec published 2016, or 2019 for SVE2) instead in an SBC.
There are of course differences between RISC-V V 0.7.1 and 1.0. The overall style and structure of code is unchanged. Some code is binary-compatible between them, for example the natural implementations of memcpy(), strcpy(), strlen() and friends is. e.g. the code here https://hoult.org/d1_memcpy.txt and here https://hoult.org/d1_strcpy.txt which I tested on a D1 board a year ago. With one caveat: to be binary compatible with v1.0 the vlb.v instruction in memcpy() should be changed to vlbu.v. One of the biggest changes between 0.7.1 and 1.0 is that loads and stores no longer widen or narrow values, so the opcodes for sign-extended loads were no longer required and were reassigned. IN this case the mnemonic was also changed, so 1.0 renames vlbu.v to vle8.u, with the same binary encoding. If the prior vsetvli specified 8 bit elements with e8 then the operation is the same.
TLDR: RVV 0.7.1 in the D1 chip and the ratified 1.0 are a little different, but 0.7.1 is not only the sole length-agnostic vector ISA available on an SBC, but is also close enough to prototype code that will usually require only minor changes to wrk on 1.0.
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sbufe I guess "is" is a bit of an overstatement in the title, considering that it's not purchasable.
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